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No-OS driver for updated axi_ad9361 core

I have managed to build the latest fpgahdl_xilinx PL from the Dec.13, 2013 drop for the FMCOMMS2 AD9361 system. I'm eager to try out the new code on my platform but discovered that the No-OS drivers do...

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Re: GPIO interrupt latency seems long

thanks for the response.  here's the other thread - http://ez.analog.com/message/13724#13724. You are correct GPIO4_TOGGLE is a macro that toggles a GPIO pin. I am measuring these times on a scope. I...

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Re: Standalone Flash Programmer

At present, I'm only attempting to program an in-house product using a flash programming driver I use regularly with VisualDSP++ 4.5 IDE.  I built this driver using v4.5.  So, I know this driver works...

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Re: AD8176 design guide / ref design / register configurated issue

Hi Nical, Your eval board request has come through our internal channels, and we'll work on getting something to you following the break. The state of the shift register cannot be read externally, so...

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LwIP fileserver project error

Hi, I'm working with  EzKit Lite for BF609 processor (rev 0.0 and 0.1 ) After running the example fileserver, the console shows: Configuring switches for the ethernet operation lwip_system_init: failed...

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Re: ADV7842: Black and White image or S-Video does not have color burst lock

So there is a colorburst pulse on the C channel when you are outputting a B/W image but the ADV7842 does not detect it? I'm assuming that your S-video will carry color video as well as black/white...

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Re: ADV7842: Black and White image or S-Video does not have color burst lock

Yes you are absolutly right. The B/W image does have a color burst but the ADV7842 does not detect it when I first plug it in.

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AD9914: profile mode vs single-tone vs parallel port modulation

I am confused about the three modes. In profile mode (CFR2:23 = 1) it is clear that the FTW, POW and ASF come from the selected profile register.If CFR2:23=0, where do the 3 values come from?If...

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Re: ADV7842 HDMI Incorrect Video Measurment

Greeting GuenterL, Your advise about the DE locked flag was correct.  It was not set for those resolutions and explains why the line width and field height were not valid.  I tested the BL, LCF, LCVS...

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Re: AD9643 - how do control the sampling rate?

Dear Harris:         I have question when I used the AD9643 + ADC-HSC-EVALCZ ,1. Setup:HWUse AD9643 EVB + HSC-ADC-EVALCZ (FPGA)Use J506 default input path:Put C532, C533 0.1uF Cap.Remove the R541 &...

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ADuM3221 Gate Pulldown Resistors

Hello,I am designing a circuit that uses the ADuM3221 to drive some MOSFET gates.Ordinarily I would include a 1M pulldown resistor on the gate pin so that the FET will be off until all the logic powers...

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ADUM3190

During startup, output of primary amplifier (eg EAout2) is at high level when VDD2 is lower than 3V. How to avoid this behaviour when ADUM3190 is included in a regulation loop.Sartup is impossible due...

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Re: Running EDID Editor in AVES

Hi.  I have one more question on EEdit program. I noticed that the format this program takes is ".dat". By the way, the format of EDID I have used is either .bin or .hex. And, EEdit does not seem to be...

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Re: Running EDID Editor in AVES

The current version can not create .bin or .hex files.  Those features are in the queue for future releases.

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Re: Running EDID Editor in AVES

Thank you.

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Re: Power sequence of ADV7619

a) The wait time is not defined 0 - 100ms should be totally safe.  The key is 1.8V rail must be less then 3.3V at all times. b) There are several solutions     1) generate 1.8V form the 3.3V supply...

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Multifunction Composite Gadget driver problem

Hi, I want to activate the Multifunction Composite usb gadget driver for the Blackfin BF548 and the 2.6.3 µClinux distribution, and I need to have RNDIS and COM port running together.But I have a...

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Re: Power sequence of ADV7619

Thank you for your quick feedback.

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Re: AD620 oscillation with long cable drive

Hi Ricky, Thank you for tracking this down. It is a great reminder of one way to use the REF input. Best Regards,Steve

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Re: What is the LO Leakage at the TX ? Image rejection?

LO leakage and image rejection are approximately -50dBc at 0dB attenuation.Datasheet includes performance specifications on carrier leakage and SSB rejection in the specification table and performance...

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