Re: CCES predefine macro for CCES rather than VDSP
Hi Mike, I think using the __CCESVERSION__ (or __VISUALDSPVERSION__) macros for the conditional check would be a good option to avoid having to add a custom macro of some sort to check against....
View ArticleRe: JTAG for ADSP-21488
Yes, i just did that 10 minutes ago in my programmer (simple look-up table) and used as SPI Master in loader settings. getting around 33.33333MHz toggle speed, (PLL should be for 400MHz) with...
View ArticleRe: Plotting filters frequency response
Hello Miguel, Thank you. How can I send you a private message? Your email appears as private and I can only follow you, but apparently I can't send you a PM.
View ArticleAD8338 AGC response time
Dear all, I am asking to myself if there is a formula for calculating the value of the capacitor in order to set the response time/bandwidth of the AGC function of AD8338 VGA. The datasheet says that...
View ArticleRe: JTAG for ADSP-21488
Hi, I would recommend posting your latest question as a new thread; it is not one that I can answer, and as this thread has been marked "answered" the question would be more visible if you start a new...
View ArticleRe: ADV7630 TX HDCP issue
Yes, the EVB run with SW.But because the source is no encryption, our SW also run TX with no encryption , So I pause the SW and activate TX HDCP feature manual. I tried with many source (whatever...
View ArticleRe: ADV7180 Tristate of outputs
I'd like to connect the outputs to a memory bus. How can I Tristate them or is this not possible?
View ArticleRe: how to measure ADXL345 angle from g value
Hi, It is not too complicated to use accelerometer to calculate the angle.If you use single axis, then the angle is just arcsin[(X/Y axis acceleration in g)/1g]. This could be a easy start for your...
View ArticleRe: ADV7180 Tristate of outputs
Check out TRI_LLC and TOD registers, theyll tri-state the output pins
View ArticleRe: Configuring ADE7878 chip with TS7800 MC
Hi Siva. From ADE7878 datasheet timing diagram on page 12, you want a default SCLK that is high.You can change MOSI on the falling edge of SCLK so that it has had enough setup time before it is sampled...
View ArticleAD6649 Evaluation
Hi,I am working on evaluating the AD6649 ADC for use in a wideband Software Defined Radio application. I have the evaluation board and the HSC-ADC-EVALCZ interface board. For initial testing for...
View ArticleRe: Noise details of AD8237 is not mentioned on datasheet
Hi Sameer, The AD8237 has a different internal architecture compared to earlier instrumentation amplifiers. The earlier in-amps have a 2 op-amp or 3 op-amp architecture, both of which have two stages...
View ArticleRe: FMCOMMS1 with KC705 with no os
And I forgot to mentionned that the Hardware design that use is the version:fpgahdl_xilinx-ad_fmcomms1_ebz_edk_14_4_2013_04_04.zipMy XPS tool is at version 14.4 as well. Please also note that the quick...
View ArticleRe: FMCOMMS1 DAC interface
Mainly two reasons: The VDMA can not keep up with the bandwidth of the DAC. It will run dry very quickly and we will have an underflow. So in order to bridge the gap between a low speed VDMA engine and...
View ArticleRe: Measurement application of op amp
Hi, depends on the measurement you are making and dynamic range (span of error) you might see. Better to use and instrumentation amplifier in lieu of an Op-Amp. Selection depends on the environment, is...
View ArticleRe: AD5422 max. update rate
Hi Niels, The AD5420 has the same settling time specs as the AD5422. The only difference is that it is Iout only, rather than Vout/Iout. In terms of step size vs settling time, looking at the "4 mA to...
View ArticleRe: EVAL-AD5933EBZ rev. C external I2C connection
Marvin, why so weird logic level 4.1V? Is it just because of the voltage ref you found? 10 bits for ADC's if i recall good?
View ArticleRe: JTAG can not find ARM CPU ID
Hi,One situation where this might be the case is where the ADUC7126 is in a kernel (or serial) download mode. You cannot talk to the part via JTAG in this mode. This can be entered or not depending on...
View ArticleRe: AD9650 offset adjust lsb weight
The only other thing I'm seeing so far is a pretty high bias (hundreds of q) on each channel. Enabling common mode servo only changes the bias by single digit values. The RMS value of the input noise...
View ArticleRe: AD6649 Evaluation
Hi Andrew, The FPGA on EVALC is limited to the 64K of on board FIFO memory as you note above. Our data capture board was developed to enable designers to evaluate the ADC performance, and it has...
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