Hi Andrew,
The FPGA on EVALC is limited to the 64K of on board FIFO memory as you note above. Our data capture board was developed to enable designers to evaluate the ADC performance, and it has proven to be flexible to allow many customers to further prototype for their end system applications. But I think we are seeing in your case that it was not designed to cover your end application. I'll contact you offline to see if there is any other way we might be able to help.
Regards,
David