Mainly two reasons:
The VDMA can not keep up with the bandwidth of the DAC. It will run dry very quickly and we will have an underflow. So in order to bridge the gap between a low speed VDMA engine and the DAC, you will need interpolation.
The existing IPs do not support samples in parallel. The interface requires multiple samples per clock. The interpolation should be able to generate that many samples per clock and running at that speed.
So we added this simple sine wave interpolation as a place holder. This module will be replaced with a Matlab + DSP48 based implementation shortly (it is in the testing process).
The sine wave curve fitting is quite easy (I thought), what part is confusing for you? This is a mathematical induction sequence. Expand the equations for sin(a + 1d) and sin(a + 4d), then get sin(a+2d) and sin(a+3d) from the two.
Another way is to consider linear interpolation SIn(n) = n for smaller n, that reduces the coefficients to 2/3 and 1/3. So if you have sample values 1 and 4 - you get 1x2/3 + 4x1/3 = 2 and 1x1/3 + 4x2/3 = 3.
This is not a zero-insertion and filtering interpolation. This is just a sine wave curve fitting (instead of linear interpolation).
Thanks,
Rejeesh