Hi,
I'm sorry, that is not supported.
- Lars
Hi,
I'm sorry, that is not supported.
- Lars
Hello JERRYLIN,
I apologize for the delayed reply. Our system did not alert me to your message and I was just made aware of it by our administrator.
The active devices in the HMC1086 are depletion mode FETs. If you simply measure resistance from drain to ground with the gate either open or at an insufficiently negative voltage, you will see a low resistance. You should instead simply power-up bias the parts in the following manner:
Vdd1 and Vdd2 can be connected together and a single drain supply used for both.
Vgg1 and Vgg2 can be connected together and a single gate supply used for both
Starting with Vdd and Vgg set for either 0V or open:
Apply Vgg = -8 V (at this low of a gate voltage, the channel will be "pinched-off")
Apply Vdd = 28 V (Once 28V has been applied, Iddq should be very low...single milliamps...since the channel is pinched-off)
Incrementally adjust Vgg more positive until Iddq = 1100 mA (this should occur at Vgg ~= -2.5V).
Apply the RF signal.
For power-down bias:
Remove the RF input signal
Adjust Vgg to -8V (to put the channel into pinch-off
Adjust Vdd to 0V or disconnect
Adjust Vgg to 0V or disconnect.
Regards,
SMcBride
Hi there,
These questions are similar to questions that were answered recently for on of our field applications folks. For the sake of others I'll answer them again.
On page 4-2 of the attached HMC394 data sheet, v09.0114, AD provides a plot : "OUTPUT POWER, 5 MAJOR DIVIDE RATIO STATES, T=25°C" the output power is given in dBm from N=2 to N=32.
In my setup, I will inject a SQUARE wave of Fin=3.1805 MHz and 9 dBm max, with N=32 (Ai=1) to obtain Fout=99.392kHz.
Q1 : what is the input power used for this plot ? is it 10 dBm ?
Answer: Data was collected originally by sweeping input power level from -20dBm to +10dBm from 100MHz to 3.2GHz for each divide state. This allows us to determine the required min / max input drive levels, particularly at the band edges.
Although we cannot change it, could you please explain in simple words why the output power is decreasing as a function of N ?
Q2 : Do you confirm that the HMC394 is able to handle the low frequency of 3.1805 MHz ?
If well understood, the answer should be "yes", according to the note (1) page 4-1 : "Divider will operate down to DC for square-wave input signal".
Am I correct ?
Answer: Technically you could DC couple to the device if you know the DC offset and subsequently operate to DC. However, we don't recommend this. We recommend AC coupling the input / output of our HMC frequency divider products both for added ESD / EOS protection and to prevent accidental damage to the device should you short the input or output (or have a transient, over-shoot, etc.). Because of this the footnote should read "Divider will operate to around 50MHz using a square wave input signal". In the footnote, the statement "near DC" implies this as 50MHz is near DC relative to the microwave frequencies that many of these products are normally used at.
But, according to the plot "Input Sensitivity Ratio States", page 4-2, there is a "RECOMMENDED OPERATING WINDOW", starting at 250MHz.
Or, is this plot for sinewave only ?
Answer: Just a conservative recommendation. Data suggest that at +10dBm it may work down to 25MHz (still a long ways from 3MHz).
Q3 : In my setup, I can feed the HMC394 with a LVDS signal, but the EVAL board only comes with a single ended input : do you know WHY AD made this choice ?
Answer: This part was acquired through the Hittite Microwave acquisition several years ago. Most RF test equipment is configured for 50 ohm, single ended test.
What is strange is that there is no possibility to select the input mode, LVDS or Single Ended, offered on the EVAL board.
If I would like to design a new PCB myself, do you confirm I can work in LVDS mode ?
Answer: You can certainly drive the part differentially. The LVDS standard at 350mV swing pk-pk @ 1.25V DC offset into a 100 ohm differential pair may not be enough to trigger the divider. The required DC blocking on the IO's makes the 1.2 V DC offset irrelevant as far as the divider is concerned so it's all about achieving enough voltage swing. The HMC frequency dividers operate closer to CML.
Personally I don't believe this is the best part for your application. I recommend you consider using one our comparators and designing a threshold level detector.
Best Regards,
Marty
Hello Marcus
I applied following patch to your original chirpScript.m script
--- chirpScript.m
+++ chirpScript.m
@@ -47,6 +47,8 @@
chrp.SampleRate = fs;
tx_waveform = chrp();
+tx_waveform = exp(1i*2*pi*(5e3:0.75:20e3-0.75)/fs.*(1:20e3)).';
+
% Do an initial TX/RX so that tic/toc timing
% works correctly in the main loop
radio_tx(tx_waveform);
and I got correct TX chirp signal and correct RX spectrum plot.
Danil Shendrik, IPrium LLC
Marcus, I think you actually want slow sweep, not fast chirp signal.
You can use following patch to get slow single tone sweep:
--- chirpScript.m
+++ chirpScript.m
@@ -47,6 +47,9 @@
chrp.SampleRate = fs;
tx_waveform = chrp();
+freq = 5e3;
+tx_waveform = exp(1i*2*pi*freq/fs*(1:20e3)).';
+
% Do an initial TX/RX so that tic/toc timing
% works correctly in the main loop
radio_tx(tx_waveform);
@@ -57,6 +60,8 @@
runtime = tic;
while toc(runtime) < 20
% Tx
+ tx_waveform = exp(1i*2*pi*freq/fs*(1:20e3)).';
+ freq = freq + 50;
radio_tx(tx_waveform);
% Receive a frame
Danil Shendrik, IPrium LLC
Hi there,
Unfortunately with such limited information it's difficult to provide much assistance. This is a mature product that we've shipped 10's of thousands of with no problem. Since testing at cold temperature's is often problematic I'll need more info.
1) What equipment are you using to measure the phase noise? If you have a block diagram or better yet a picture of your setup it may help.
2) Are low noise power supplies (Agilent 6626A, ports on E5052 or LDO's) and double shielded cables being used for VCC and VTUNE ports?
3) Oven or Cold-Plate?
4) Nitrogen being used in atmosphere?
5) Are you able to make a good measurement at any temperature?
6) What do you mean by 2 degree windows? Every 2 degrees or only certain area's of the +45C to-10C range?
7) Any data you can share?
Best Regards,
Marty
Hi Henry,
The Sigmastudio dll is not tested for ADAU1977 so not sure if it would work. The installer on the product page works on all our PC's with windows 7. I will forward your question to Software team to look at urgently.
Regards
Rajeev
Hi there,
I believe the problem is related to the lock detect window. Clearly the device is locked but the LD_SDO pin is not reporting that it is locked at +85°C. This occurs when the digital lock detect window is either not correctly sized or is positioned asymmetrically such that at one temperature extreme or another the window is exceeded. The lock detect window shifts +/- 25% over temperature so the higher the phase frequency detector (PFD) frequency being used, the easier it is for the window size to be problematic. If you're operating at a PFD frequency of 50MHz or below you may be able to get away with using analog lock detect. I would need to see your register settings and know your reference frequency to provide any additional help.
Best Regards,
Marty
Hi, I am working on a custom board layout for the ADSP-21489. The end product will use a 9 volt power supply.
I am using the Ez-Kit schematic as a reference for my design, but the regulators here are designed to work with a 5 volt power supply rather than 9 volts.
Can anyone recommend a substitute part for the regulator that would work with 9 volts?
Hi,
Please refer this thread EVAL-ADV739xFEZ for FTP problem. Hope that this would resolve your problem
for the solution
Best Regards,
Jeyasudha.M
The RFin pins correspond to pin 10 and 11 of the ADF4150 IC. Thanks!
Hello Kris,
Thank you for your answer.
We weill confirm ADA4177.
Regards,
Terumasa
Hi Gary,
Thank you for your kind reply. It was very helpful.
I have another question about NEUTRAL CURRENT.
It's the simple question. Why and where do I use the Neutral Current RMS?
And should I connect CT sensor to INN - INP port, then should I penetrate CT sensor through neutral line?
I have lack of knowledge of neutral current.
Is it because calibration or current phase compensation things just like the link below?
AC Three-Phase Neutral Current - YouTube
Regards,
ghsung
Hi ADI,
Can AD9363 support multichip synchronization features like AD9361?
br/leon
Dear Sirs
Could you provide the bidirectional bus Equivalent Circuit? TKS
BRS
Nat
AD9363 does not support Multichip synchronization (MCS).
Hi
I want to use ad9674 in ultrasonic ndt product, I am not very happy run at 65MSPS. But seems that if use sample rate higher than 65M, we need to use RF decimator. I know the the lvds output was limited to 1G bps, I want to know if I can run sample at 80M 12bit without RF decimator?
Thanks
Thank you for your rapid response.
I will consider it.
Hi, Kris.
That’s correct !
Met vriendelijke groet / Kind regards,
Hans Splinter
Technical Sales Engineer
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Hi rajam,
Actually you test the error at different frequency, if you do the calibration at frequency A, the parameters like voltage gain and so on may not be the best for frequency B. If your application don't need a frequency range, please fix one frequency point for calibration. If your application really need a frequency range, you can do the calibration at different frequency point and try to find a "best" parameter to use at each frequency. By the way, you should take enough times for each point data for average. Here is the calibration link I think will be helpful to you http://www.analog.com/media/en/technical-documentation/application-notes/AN-1076.pdf. Thank you very much.
Best regards,
Gary