Re: Practical OpAmp filter based on Filter Wizard design not working
Hi Spacerowa, The filter wizard supports single supply operation, but does not do any level shifting for you. In other words, it expects the input signal to be centered around the mid-supply voltage....
View ArticleRe: AD8618 supply decoupling
Harry, Many thanks for your reply. At the moment we plan to build 4 of these boards. We might order one first and test the overshoot and oscillatory behaviour as you suggest. In any case, how could...
View ArticleRe: CCES and BF592 Simulator
Hi, As you are asking if the simulator is completely integrated into CCES I assume you are looking to run CCES from the command line from an automation point of view? If so then there is currently no...
View ArticleRe: ADI sim power calc. tool for ADP1972
Hi Kaos, Thank you for your interest for ADIsimPower and ADI products. Unfortunately, the ADP1972 is not supported by ADIsimPower. Please feel free to let us know if you have any other questions for...
View ArticleRe: 7816 Power Direction, revised datasheet
Hi dBC, Sorry for the confusion, in your scenario it does not affect the monitoring of the direction of power. It is true that in order to read the current direction from the CHSIGN register, only...
View ArticleRe: 给的例子怎么有错误啊
I will translate the question. The question asked is: Why there is a mistake in the example of ADV7511 XILINX EVALUATION BOARDS REFERENCE DESIGN? In hdmi.h, there is no address provided for #define...
View ArticleRe: CN-0267: DEMO-AD5700
Hi there, The CN0267 demo features a complete HART FSK interface, compliant with HART 7.0 specification in terms of the HART physical layer specification. However, the firmware downloaded to the...
View ArticleRe: AD8183 for new design
JerryS, There are not that many triples at high frequency; the closest would be the ADG1233.They may want to look at duals and quads for more choices. Harry
View ArticleRe: BF518 Timer WDTH_CAP mode problem
Hi Jin, It is generally recommend that, where possible, you avoid making use of printf() - or any STDIO for that matter - over JTAG when running code that requires precision timing. The default stdio...
View ArticleRe: Help debug ADP2370 (fixed 3.0V) but getting 1.6V out
Hi Aryasaro, The connections of the pins look right. How much is the load? If the peak inductor current reaches the IC current limit, the output voltage will drop. Regards, Hong
View ArticleRe: Problems using the BF527 Button_LED_GPIO example
Hi David sir Is this default setting ( I mean as you mentioned earlier Button_LED_GPIO example).or only used for Button _LED program..
View ArticleRe: Routing PCB Traces inside FPGA ? Adv7188 - Adv212 - Spartan6
A star configuration can work. For SDTV we are only talking 27MHz clocks which is not a problem for the FPGA. The real question is what do you gain by doing it this way. If all you are doing is...
View ArticleImpedance matching problem in application note AN-1214.
I got a reference circuit of AD8130 in application note AN-1214: The note said that "The two 49.9 Ω resistors( in the red square) in series with the AD8130 input pins improve the overall distortion...
View ArticleRe: Fiber Optic Gyroscopes
Hi Kumar,I might be missing something important, but won't the AD7760 provide this? The AD7679 provides 18-bits at 570 kSPS, while the AD7760 provides 24-bits at 2.5 MSPS. Admittedly, I haven't done...
View ArticleImpedance matching problems of AD8130 in application note AN-1214.
I got a reference circuit of AD8130 in application note AN-1214:The note says that "The two 49.9 Ω resistors( in the red square) in series with the AD8130 input pins improve the overall distortion...
View ArticleRe: AD9913 - Programming back-to-back frequency ramps
Hi Louijie, Thanks so much for getting back to me. We tried setting the Autoclear phase accumulator CFR1 bit to 1. It didn't help. We also set the Autoclear auxiliary accumulator bit to 1. That didn't...
View ArticleAD7626 Bit error in the output
Hi, I'm using the AD7626 within my design with the input circuitry as proposed in the datasheet (single to differential configuration with the proposed amps). The complete control of the ADC (cnv, clk,...
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