Lars,
Sorry. That was a midnight flub. I should have paid attention to address 0x8000000 (ADC memory). Anyways, here is the register records on DAC DMA, for fs = 491.52MSPS:
AXI_DMAC_REG_CTRL: 1
AXI_DMAC_REG_TRANSFER_ID: 1
AXI_DMAC_REG_START_TRANSFER: 1
AXI_DMAC_REG_DEST_ADDRESS: 0
AXI_DMAC_REG_SRC_ADDRESS: E000000
AXI_DMAC_REG_X_LENGTH: EFFFF
AXI_DMAC_REG_TRANSFER_DONE: 0
AXI_DMAC_REG_ACTIVE_TRANSFER_ID: 0
AXI_DMAC_REG_STATUS: 0
AXI_DMAC_REG_CURRENT_DEST_ADDR: 0
AXI_DMAC_REG_CURRENT_SRC_ADDR: E01B400
AXI_DMAC_REG_DBG0: 22113302
AXI_DMAC_REG_DBG1: F0
while for fs = 245.76 MSPS is:
AXI_DMAC_REG_CTRL: 1
AXI_DMAC_REG_TRANSFER_ID: 3
AXI_DMAC_REG_START_TRANSFER: 1
AXI_DMAC_REG_DEST_ADDRESS: 0
AXI_DMAC_REG_SRC_ADDRESS: E000000
AXI_DMAC_REG_X_LENGTH: EFFFF
AXI_DMAC_REG_TRANSFER_DONE: 0
AXI_DMAC_REG_ACTIVE_TRANSFER_ID: 0
AXI_DMAC_REG_STATUS: 0
AXI_DMAC_REG_CURRENT_DEST_ADDR: 0
AXI_DMAC_REG_CURRENT_SRC_ADDR: E051A80
AXI_DMAC_REG_DBG0: 33665503
AXI_DMAC_REG_DBG1: F0
Please let me know if it means something to you.
In the meanwhile, I'm trying to rebuild the project with 128bit on source side as you suggested (256 / 512 will work as well? but over-designs?) Will let you know.
Best Regards,
FArid