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Configuration issues with ADF4159 and ADF5901
AD7124-4 RDY bit always set to 1
Dear all,
I made the Arduino porting communication code for the AD7124 library provided by Analog on github.
Making my sketch where I'm using just one AD7124 I'm not able to read data from the converter even having the right data register setting:
This is done in setup function
// Initialize AD7124 device
ret = AD7124_Setup(ad7124_handler, AD7124_SLAVE_ID, (ad7124_st_reg *)&ad7124_regs);
if (ret < 0)
Serial.println(F("AD7124 initialization failed, check the value of ret!"));
else
Serial.println(F("AD7124 initialization OK"));
// Enable the channel, Setup #0 for this channel, AIN5 = AINP, AIN4 = AINM
ad7124_regs[AD7124_Channel_0].value = AD7124_CH_MAP_REG_CH_ENABLE | AD7124_CH_MAP_REG_SETUP(0) | AD7124_CH_MAP_REG_AINP(5) | AD7124_CH_MAP_REG_AINM(4);
ad7124_regs[AD7124_Channel_0].value &= 0xFFFF;
AD7124_WriteRegister(ad7124_handler, ad7124_regs[AD7124_Channel_0]);
ad7124_regs[AD7124_Config_0].value = AD7124_CFG_REG_REF_BUFP | AD7124_CFG_REG_REF_BUFM | AD7124_CFG_REG_AIN_BUFP | AD7124_CFG_REG_AINN_BUFM | AD7124_CFG_REG_PGA(ADC_GAIN);
ad7124_regs[AD7124_Config_0].value &= 0xFFFF;
AD7124_WriteRegister(ad7124_handler, ad7124_regs[AD7124_Config_0]);
ad7124_regs[AD7124_Filter_0].value= AD7124_FILT_REG_SINGLE_CYCLE | AD7124_FILT_REG_FS(2047);
ad7124_regs[AD7124_Filter_0].value &= 0xFFFFFF;
AD7124_WriteRegister(ad7124_handler, ad7124_regs[AD7124_Filter_0]);
// Continuos read, Full power, Continuous conversion mode, internal 614.4 kHz clock
ad7124_regs[AD7124_ADC_Control].value = AD7124_ADC_CTRL_REG_CONT_READ | AD7124_ADC_CTRL_REG_CS_EN | AD7124_ADC_CTRL_REG_POWER_MODE(3) | AD7124_ADC_CTRL_REG_MODE(0) | AD7124_ADC_CTRL_REG_CLK_SEL(0);
ad7124_regs[AD7124_ADC_Control].value &= 0xFFFF;
AD7124_WriteRegister(ad7124_handler, ad7124_regs[AD7124_ADC_Control]);
This is in loop function:
// Read data from the ADC
ret = AD7124_WaitForConvReady(ad7124_handler, timeout);
if (ret < 0)
Serial.println(F("Something went wrong, check the value of ret!")); // FOR DEBUG ONLY
ret = AD7124_ReadData(ad7124_handler, sample);
if (ret < 0)
Serial.println(F("Something went wrong, check the value of ret!")); // FOR DEBUG ONLY
Here if I try to read the status reg I have the RDY always "1".
I cannot figure out why because if I read the register value, they are well set.
Any suggestion?
Re: 'unbind' / 'bind' of ad9361 spi driver
Can anyone explain what drivers needs to be unbind and bind if you want to change the bitstream from an operating system?
I'm talking about the zedboard + FMCOMMS3 configuration
Thanks
Jan
Re: AD5668-1 (DAC) + AD9832 (DDS) REF IN/OUT
Hi,
Apologies for the delay. Im not getting the email alerts.
Im not sure what you want to do...
Seems to me that you want to use a common reference and control the amplitude of each DDS individual.
In this case, connect the AD5668 1.25V reference to the REF_in of the different DDSs, and leave REF-out floating.
The connections from the Vout to the FS adjustment are correct.
BTW... if you want immediate voltage change leave comp pin floating... you will trade-off stability vs speed.
Regards,
Miguel
Re: Burst modulation around carrier using EV-ADF4159EB1Z
Hello ,
thank you for your answer.
In fact, the LED D1 lights up correctly but its light is very weak almost imperceptible.
Best regards
Pier Giorgio
Re: problem for global array with big size in Visual DSP++
Hi,
Can you please share us your example project which replicates this issue along with the steps to reproduce.This will help us to assist you further.
Regards,
Kader
Re: JESD link is not working on DAQ2 and ZCU102 hardware setup
Thanks Rejeesh for your advice. Since we have limited understanding the xcvr HDL, I am not if we can get it to work before you :-(. But, we will have a go and let you know how it goes.
Cheers, Rejeesh
Re: Nesting and NonNesting SEC Interrupts
I understand it.
Can I turn OFF NESTM when my program execute SEC Interrupt?
If I can do it so I can realize to support for some SEC interrupts using shadow registers and I take to superfast interrupt support.
Now I have the official superfast interrupt support in VDSP++ and the unofficial superfast interrupt support in CCES .
Re: FMCOMMS2 Zedboard: very long compilation time with Vivado
Thanks a lot to both of you.
Rejeesh, actually I do not use the "make" any more. From the GUI I have tested the "incremental compile" sometimes it was a bit faster (13 min instead of 15, great!), sometimes not!
Travis, for now I still need the HDMI, but yes at some point I could remove it.
PS. I have tried to remove the audio module (I2S), the compilation was not much faster, and the Linux did not boot any more...
AD5560 Force Current Limit issue
Hello!!
I am now testing the AD5560 Eval Borad. An external load is connected and test the output of the current. A current of about 300 mA more is not output(less than 300mA Current output OK). The current clamp is not used and the measured value is less than the set voltage value when the MEASOUT pin is set to VSENSE while outputting 300mA (the measured voltage value is measured according to the set value at output of 300mA or less)
The power supply was connected to AVDD / HCAVDD = + 12V (22A), AVSS / HCAVSS = -12V (0.3A) and DVCC = + 3.3V (20A). Current Range is set to EXT1 Current Range.
I would like to know if the current of 300mA or more is not outputted because the input current of -12V is small.
Thank you.
Re: ADF7242 stops generating Receive interrupt to Linux driver
Once you stop receiving can you read the debugfs status attribute?
root@linaro-ubuntu-desktop:/sys/bus/spi/devices/spi32764.0# cat status
What do you get?
-Michael
Re: Can an SSL be built with uCOS and lwIP?
Hi,
Can you please share us your project along with the steps to reproduce the issue.This will help us to assist you better.
Best Regards,
Kader
ADV7619 Equalizer settings
Hello All,
Our customer has a trouble about HDMI 1.4 compliance test. Their products failed the test by ID8-7. Input signal is 1920x1080p(12bit) 222.75MHz. Signal level is 0.4Vp-p.
The customer tested 4 boards. They are same PCB and used same parts. One of four boards passed the test. But three boards were failed. As for the boards, the picture is blinking and/or displayed color despite it is black -and-white picture.
The customer is suspicious of the equalizer settings for this issue. Are there any advices for improvement this issue?
I attached their current equalizer settings.
Best regards,
Akira
Re: No Os driver on hdl-2016-r1 branch
Hi dragosB
No OS driver is working now but there is a reliability issue.
some time when i run debug configuration, RX tuning and TX tunning fails but when i again run debug configuration without any change(software as well as hardware) ,RX tuning and TX tuning and passes and everything works fine.
How to resolve this reliability issue?
Regards
J S Hyanki
Re: ADV7180 Comb on/off
Hi,
We are checking with part specialist on this one and you will get an update soon
Best Regards,
Jeyasudha.M
Re: AGC calibration in ad9361 at 5GHz
Hi sripad
but RSSI feature does not give absolute power. So how to calibrate it for absolute power? suppose i apply -20dBm signal to RX port and reading RSSI 20dB i am assuming that RX chain has given 20dB gain in -20dBm signal. Am i correct?
Reghards
J S Hyanki
HMC666_using IF pin without 1:1 transformer
Re: 'unbind' / 'bind' of ad9361 spi driver
TFT interface IC with digital inputs
Hi
Kindly suggest an IC to interface NHD-5.0-800480TF-ATXL which has integrated touch control option with digital inputs.
Thanks
Bivin
Re: ADF7242 stops generating Receive interrupt to Linux driver
This is what I get:
IRQ1 = 0:
STATUS = A4:
RC_READY
RC_STATUS_RX
RSSI = -106