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AD9959 SPI stops working after 20 bytes

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Hi,

I'm trying to control the AD9959 chip via SPI using an Arduino (3.3 V version). I am able to send a few commands (upto 20 bytes), but after that the AD9959 does not update any further. I've tried something as simple as toggling between two different frequencies. This updates 5 times and then no longer changes. I can then only update after applying the reset trigger. 

 

A couple things I have tried without any success - 

1) Checked that it did not have to do with the SPI communication rate by turning it low.

2) Set the IO_Update trigger to be much longer than the SYNC_CLK period. I send an IO_Update after every command.

3)  Checked that it did not depend on which command I sent. I tried a combination of amplitude, frequency, PLL ratio control. In all these cases it updates only upto 20 bytes total

4) Checked that the Arduino output is still correct beyond 20 bytes.

5) The SYNC_IO pin is grounded

 

If anyone has insight into why this might be happening would be very helpful.

 

Thanks !


Re: How do you reduce the effective sampling rate of the DAQ2 noOS project for the KCU105 with analog JESD204B?

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This is good, the checksum error means there is still some settings mismatch, read the registers 0x450 to 0x45A (double check with the data sheet) and see if any of these settings do not match that of the JESD. Link is up probably because these are a super set (an integer multiple) of the DAC settings and/or some minor mismatches on other things (LID and such).

 

BTW, also check the analog outputs, once you have this cleared up, you will be in a more solid footing to make changes further.

Re: hdl_2016_r2 for kcu105

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Yes, you need to grep that log file. If that returns nothing, grep on the runme.log files.

Something along these lines :-

 

grep -i error daq2_kcu105_vivado.log

grep -i error daq2_kcu105.runs/synth_1/runme.log

grep -i error daq2_kcu105.runs/impl_1/runme.log

Proper audio codex for ultrasonic sampling with a Beagleboard-XM

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We plan to use a Beagleboard-XM to plug simultaneously 4 USB ultrasonic microphones (384 kHz sample rate x 4). We are looking for an audio codec that could be used to pick up ultrasonic signals from 1 to 192 kHz and store them into a WAV file format to a 32Go microSD and / or send them througth the Ethernet port. It seems the ADAU1777 could work: http://www.analog.com/en/products/audio-video/audio-codecs/adau1777.html 

Is it compatible with the Beagleboard-XM ? Is there any audio codex that could be of use?

Re: [BF70x] call condition about adi_rom_Boot()

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Jithul_Janardhanan Thank you for your reply,

 

I finally was successful running the BF707_SSL sample code that was provided with the http://www.analog.com/media/en/technical-documentation/application-notes/EE374v01.pdf on my EZkit BF707 eval board.

 

What I don't understand is to why (and that's what my issue was) in the adi_rom_Boot():

  • pAddress: had to be the address of the SPI2 memory mapped sector
  • command: had to be SPI Memory-Mapped Mode as indicated below

 

 

Where usually my BMODE is SPI2 Master from external Flash.  Since this sample code is working I will start building my ssl from it.  I'm implementing a firmware upgrade mechanism with two images of my application in Flash and the second stage boot loader loads the application from either sector based on a flag set in flash.

 

Question:  I browsed through the API of the adi_rom and do see some CRC32 functions.  If I would like to validate the image from flash before loading it and running it does the boot ROM driver and programming model already has a CRC check implemented?  Or I need to implement my own crc in the image and validation in the SSL code?

 

regards.

Re: HMC834 problem communicating with SPI

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If you monitor SEN and SCK during power-on you can check for an inadvertent rising edge.   The rpi power-on behaviour of the SPI outputs may not be well controlled. 

Re: HMC834 problem communicating with SPI

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I'm performing manual poweron by asserting CEN (pin 17), is that not the same?

Re: Looking for a simple OSD example for adv7623

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Hello Jeyasudha,

 

I added your files (  0_flash_mem.c ,  0_state_machine.c,  0_state_machine.h) and osd_control.c, osd_common.c ... ( all that had been neded to compile without errors. I²C and SPI communication functions are also ok.

When I step the program, only the functions below are executed.

ADIAPI_OsdConInit
     VRX_set_SPI_SHARE_OSD_EDIDB
     ADIAPI_OSDInit_Rep ( only I²C configuration output)
     OsdCon_InitSelectedItems
         OsdCon_StatusPanel1Control
             ADIAPI_OSDCustomStringUpdate
                 WriteSPICommand (buffer, 18, buffer, 0, FALSE);asically

 

I think there is something basically missing. Are there any other functions that have to be executed prior to ADIAPI_OsdConInit ??

Kind regards

Klaus S.


ADE7878 Current measurement

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Dear All,

 

I am using ADE7878 for 3 Phase Energy meter purpose. I have calibrated 3 voltage channels. Now, i need to calibrate current channels.

 

Actually I am using 5 A : 333 mV Current transformer. 1,5 mV CT output  is given to ADE7878 Current channel ADC inputs through filter circuits (I didn't use the R1 and R2 burden resistors because I have CT current to voltage ).

what is the configuration that I need to do to have a correct IARMS value ?

 

what is the method that I need to use in order to calculate a AIGAIN register value ?

Please tel me how to solve this.

 

Waiting for your reply.

 

Regards,

Nouredinne

Re: AD5546

Re: AD9136 JESD LINK error

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You mentioned you compensated for the P/N polarity switch in software, however did you compensate for the swap in SERDIN0 and SERDIN3 with the crossbar in the part or FPGA code? Guessing this is why the link might still not be coming up as the data on the physical SERDIN lanes isn't what's supposed to be going to the programmed logical lanes in the part. The crossbar settings in the part are listed in Register 0x308 through 0x30B so I would check to make sure those are swapped appropriately and see if that helps to bring the link up.

Are you aware that the blackfin port is now deleted from the u-boot site, as of today?

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I saw the e-mail from Tom Rini at 8 am today. This is not a good look for Analog Devices. Why is nobody assigned to maintain u-boot?

Re: ADV7188 Line Length Recognition

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Hi Amnon,

 

Could the camera be outputting a standard that is not NTSC?

Try setting up the ADV7188 to auto detect the input standard and enable all standards to be detected.

 

If the camera is outputting a non-standard version of NTSC then the ADV7188 may not be able to lock to it.

 

Rgds,

Derek

Re: AD8253 excessive bias current

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Harry,

 

Thank you for the immediate feedback. I'm fairly familiar with "typical"

specs in a competitive world - in marketing terms it normally means we

saw one almost this good once, but in engineering terms I have to depend

on published specs to be somewhat useful for rough guidance. If I get

worst case Ib at room temperature and if it increases by several times

again over temperature as datasheet Fig. 19 implies, I could have an

18-bit DAQ design with a 25% offset error spec. That's a problem for me,

and would require a few days with a Tenney to find out.

 

 

If a large customer is consuming binned parts we don't have the volume

to compete with that. Is that a thought example or are you allowed to

say if it's reality with this part?

 

Thanks,

 

Gary

Re: What GNU Radio Source and Sink blocks are used with Pluto? Is Pluto compatible with the standard in tree USRP Sink and Source?

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John:


I think both. There are some generic IIO blocks that work with Pluto. I use the upstream Debian blocks with phosphor all the time. 


There is some updated code in github, and I think even those need some tweaks to use the native USB interface (currently uses the Ethernet/RNDIS interface), which may limit throughput a little more. 


- Robin


ADV7623 debug questions

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I am considering the ADV7623 for a project, and am trying to understand what type of debug functionality is available in the part.

1) Does the ADV7623 have any test  functionality that would allow it to store a single video frame (non-HDCP) that can later be read out over its I2C interface?

2) Are there any documents regarding test or debug functionality pertaining to the Packet Processor or Infoframe Packet Memory?

 

Thanks

Re: AD9136 JESD LINK error

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Hello,

Thanks for the reply. By the way, I am using 4 lanes.

I didnt change the FPGA design to not make more mistakes :-).

 

I thought by changing the

ad9144_init_param default_ad9144_init_param = {
2, // jesd_xbar_lane0_sel
3, // jesd_xbar_lane1_sel
0, // jesd_xbar_lane2_sel
1, // jesd_xbar_lane3_sel
};

to ad9136_init_param default_ad9136_init_param = {2,0,3,1};

in the main, I was changing the crossbar.

Am I doing the right conversion?

 

I wanted to try with for slower lane rate:

   - Interpolation x1

   - FDAC=122.88MHz

 

So I changed the reg:

   - @0x230 to 0x08

   - @0x289 to 0x05

 

Then the SERDES PLL does not lock anymore, am I missing something?

 

Thanks for your support.

 

Best

Chris

Re: AD9371 MCS issue

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Rejeesh, I assumed this register is for A10 SOC side? I am having hard time understanding the reg map.

So basically on my Non-OS setup I need to have a way to read/write the altera_jesd405_tx_regmap register?

 

Reg0x50 bit9, I can try toggle the bit and see what happened? Currently I do not have a way to write to JESD in HDL side. Would it be easier to do in linux kernel?

 

Benson

Timer Control

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Hi, 

  I'm trying to start the timer, stop it after some event and want to read the time. I have referred the timer code in the BSP but I'm not able to design my code. Can you please help me by providing a simple code?

Re: Any reason that CCES would crash while tracing standard template library string functions?

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OK, a little more investigation into this, it looks like this is only occurring when an exception occurs during a standard string operation.

 

So if I fix my code, the problem goes away....

 

Still only crashes CCES when tracing with F10 and not with F5.

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