Testing of Gyroscope
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I am wondering if there is an easy way to connect ADXRS645 gyroscope to labview to test it
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Re: Linux Kernel Driver support for ADIS16465
Here are some notes that I was able to compile, for adapting embedded C/C++ code that was written for the ADIS16470, for use with the ADIS16465. I hope that this helps.
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Re: I am wondering if there is an easy way to connect ADXRS645 gyroscope to labview to test it
Thank you for your interest in the ADXRS645. I suspect that using this breakout board would enable simple connection to an A/D device that NI offers.
EVAL-ADXRS645 Evaluation Board | Analog Devices
In making this connection, I would encourage you to make the connection as short and clean as practical, as the 100 deg/hour in-run bias stability will have an equivalent signal level of ~25uV.
That does not set the expectation for the ADC resolution, but it does provide a guideline for the level of external noise (from the connection or setup) which can influence the most key behaviors.
I hope that this helps.
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HMC8410 Not Operating as Expected
I am noticing some very strange behavior when biasing the HMC8410. Starting from a gate voltage of -2V, I turn a potentiometer and slowly increase the gate voltage while monitoring the drain quiescent current (RF input is not applied). The drain quiescent current increases from 1 to 10 mA, and then suddenly spikes to 100 mA. Attempting to then decrease the gate voltage (and correspondingly the drain current), the current decreases smoothly to ~85 mA before suddenly dropping back to 1 mA. Any insight into this strange behavior would be appreciated!
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Re: AD9371 RF LPF bandwidth setting
Thanks.
I think that will work but not what I want to ask.
My question is "Can user change the LPF/analog filter bandwidth ONLY, without going thru generate a whole new profile? or what is the requirement to change the LPF/ analog filter on AD9371?"
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Re: DCR Sensing
The DCR sensing is described in detail on page 16 of LTC3784 data sheet. The resistors R1 and R2 along with capacitor C1 in Figure 2B are used to replicate the current sense waveform required for current mode operation. The resistor R2 is not always required. The equation on page 17 can be used to calculate the values of R1, R2 and C1.
I hope that this helps.
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Re: Can I find any documets about part status?
Hi Paolo,
Product status information is posted in the ordering guides on the respective Product Pages on www.analog.com. Typical Product Status classifications are Production, Not Recommended for New Designs, or Obsolete.
Best Regards,
TonyM
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Re: Problem using limiter in Sigma Studio after an FIR filter, as the Limiter gets frequency depenent.
Dear Dave,
Did you have some time to check for the Problem of the frequency dependancy of the Limiter?
Thanks,
Tamas
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Re: Accelerometer Tolerances to Magnetic Fields and Radiation
Thank you for your reply. This has been very helpful. I apologize, but I spoke with my team lead, and we need sensors that are radiation-hardened and can handle extreme environments. I know I mentioned just accelerometers here, but given this new requirement, things have changed. I need a magnetometer, an accelerometer, and a gyroscope (possibly a combination of all three in a single chip) that can meet the mentioned criteria. We plan to put all of this in a warm vacuum, so I'm trying to see what are the available sensors that meet these environmental operating conditions.
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Re: Accelerometer Tolerances to Magnetic Fields and Radiation
We sincerely appreciate your interest, but none of our MEMS accelerometers, gyroscopes or IMUs come with any assurance for performance or operation in radiation environments.
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Re: About "analog device fifo 4-5 interposer" in ftp
Hi,
The AD9613 ADC family evaluation brd setup guide is avail here: http://www.analog.com/media/en/technical-documentation/user-guides/UG-293.pdf
The HSC-ADC-EVALCZ FPGA configuration binary file is provided/installed within the VisualAnalog Evaluation Software avail here: http://www.analog.com/en/design-center/interactive-design-tools/visualanalog.html
The HSC-ADC-EVALCZ FPGA source code example for the AD9643/AD9613 ADC family is provided as-is here: ftp://ftp.analog.com/pub/HSSP_SW/fpga/
Best Regards,
TonyM
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Directly connect TX and RX on ADRV9364
Hello,
I just received my ADRV9364. I noticed that people directly connect TXA to RXA and TXB to RXB to make a on-board loop, for example, in this ADI videoGetting Started with PicoZed Software Defined Radio (SDR).
I have checked the datasheet. The max safety input power is 2.5 dBm but the output power can be 8 dBm on TX ports. Is it safe to connect them directly?
Thank you very much.
Regards,
Roberto
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Re: Does visual analog work if I change the code of fpga?
Hi,
I am not familiar with "fifo 4-5 interposer". Our default AD9613 Eval setup is the only one we support and is described in this similar thread:https://ez.analog.com/thread/102569-about-analog-device-fifo-4-5-interposer-in-ftp
Best Regards,
TonyM
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Re: AD9695 Evaluation board with Virtex 7 support
Hi Arjun,
Our standard AD9695 Customer evaluation brd uses the FMC connector and mates to our ADS7-V2EBZ Virtex7-based capture hardware described here: http://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/EVAL-AD9695.html#eb-overview. Our eval kit includes access to the AD9695 product-specific FPGA configuration and software control/analysis tools.
The AD9695 ADC Eval Brd should mate to a standard COTS Xilinx Virtex7 platform but you would need to provide your own FPGA configuration code and control/eval software.
Best Regards,
TonyM
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Re: about visual analog fpga configuration
The ADI Product specific FPGA configuration is initially loaded by our VisualAnalog software tool as shown in your screen capture above. The configuration will remain in the FPGA until power is cycled on the HSC-ADC-EVALCZ. Cycling the power to the HSC-ADC-EVALCZ clears the dynamic FPGA configuration.
Best Regards,
TonyM
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Re: AD7934 Intermittent BUSY signal
I have a couple of bits of information that might be important.
Firstly, I've just noticed that when the dodgy BUSY signal is detected, the data bytes always go low (at least DB0 does) I need to double check that this happens to all the data bits, not just DB0, but I don't see why it would only just be the DB0.
Secondly, often these errors usually come in chains, there will be a bunch of consecutive errors, and then a bunch of consecutive successful BUSY signals.
I will attempt to resolder the AD7934 tomorrow, just in case there is some dodgy solder connection causing this somehow. I could also replace it with an AD7933 if that would be helpful?
EDIT. finalfthing I forgot to mention, my CS, WR, and WB pins are driven by open collector outputs on my fpga with 1k pull up resistors. This means the low to high transition time on these lines is a little slow.
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Re: AD9106 Full scale Output current
Hi,
I moved your thread to the High-Speed DACs community.
Someone here will be able to help you.
Best regards,
Mark
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Re: If DAC CHANNEL D of AD5755-1 is not used
Hi nrsk,
Connect VSENSE to VOUT.
Best regards,
Rainier
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HMC835LP6GE Logic spec.
Hi all,
We wonder the logic specification of the HMC835.
Generally Logic voltage level @ CMOS,
Low : 0 V to 1/3 VDD
High : 2/3 VDD to VDD
;VDD = supply voltage
Following the Electrical Specifications @ the datasheet,
DVDD Digital supply, 3.3 V nominal
Logic Inputs
Vsw : 0.9 V (typ)
This means, each logic threshould voltage is,
Low : <0.9 V (typ) ?
High : >0.9 V (typ) ?
Is it correct ?
We can not understand this spec.
Logic Outputs
VOH Output High Voltage : 1.8/3.3 V (typ) Why is it two voltage ? @ DVDD = 3.3 V.
VOL Output Low Voltage : 0 V (typ)
Best regards,
sss
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Re: Directly connect TX and RX on ADRV9364
In a cabled loopback configuration I would recommend keeping the transmitter attenuated (digitally) below -10dB in general. You will have better linearity and not saturate the receiver. I test my AD936X devices in this manner daily.
-Travis
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