Hello Brigid,
The output power from the Tx_2 port is -18.20dBm and i had used 6dB attenuator to measure this power. In the ADF5901(Tx) data sheet the Tx output power is 2dBm to 10dBm and typical is 8dBm. If i feed the Tx_2 output directly to Rx_4 with out any attenuator will the Rx withstand the power, bcoz as per the ADF5904(Rx) datasheet the input power which we can feed is -10dBm.
Can you please advise me on this concept.
Regards,
chethan.
Hi,
In the case of the last shot, with alternating high/low signals, I think that the switches would be as follows:
1: Not connected (unknown)
2: Not connected (unknown)
3: Closed
4: Closed
5: Open
6: Open
7: Closed
8: Closed
But this would be the same if the first 4 bits were all low (which made me think perhaps I had the clock running too fast, and my 8 bits were in fact being read as 16 and so only the last 4 bits would produce 8 inputs, but as you said it doesn't seem that way). The pairs of switches can be reliably operated (toggling a bit always changes the same pair of switches to the desired state) but that doesn't help that much. The first half of the 8 bit transmission never has any effect (that I can see).
I've only observed this in one device - I've created a second board with a slightly modified layout to test again but I'm currently waiting for some voltage reference chips to arrive to be able to complete the board, which this time has been assembled using solder paste rather than a soldering iron.
I'll post again once I have that complete and have tested (probably early next week) but I'm still curious as to what might be causing this for the existing board. My guess is perhaps that I broke it during assembly, but if it is a programming problem I'll need to fix it for the case of the new board also.
Hi Ysuzuki,
Glad to have helped. Let me know if there are other concerns.
Best Regards,
May
Hello Weston,
Thank you for your advice and providing the files. There are very useful for us.
Thanks & Regards,
Akira
Hello,
I use Griffin-SC584 ASRC with I2C.
I'd like to know behavior of ASRC mute-out function.
Mute-out appears when its sampling rate was changed.
In case of input signals(bclock) stop asynchronously, does mute-out function automatically?
Otherwise, what is the condition that mute-out works ?
Thanks and Regards,
Thank you
Is it possible on ADV7842 HDMI capture only 720p out of 1080p input?
Hi, Koushik
Thank you for reply.
A further question came from the customer.
Where the resistance value of B1 - W1 was measured when A20 was connected to AC + DC and when it was used for OPEN, why is there a difference? Is there a way to solve it?
Is A20 correct for use with OPEN?
Best Regards,
Yuya
Hi,
The Kit was supposed to be available for purchase by Jan 30, 2018.
Will this kit available for purchase or not?
Thanks,
Dipali
Hi,
I've run Linux on zcu102 as you suggested and posted the results here a week ago. Why am I getting the messages "unable to read attribute" on iio device and "cannot open file '/sys/bus/i2c/devices/14-0050/eeprom' "?
-Aswathy
Hi,
I have a 1024x768 @60Hz video as input to the ADV7611. However, i need resolution of 1024x768 @50Hz at the output but there is no option for 1024x768 @50Hz in the HDMI Graphics Mode. However, there is an option of V_FREQ[2:0] in ADV7611, that is used in free run mode. If i set it to 50Hz, and somehow enter the free run mode will i get an output video with vertical frequency 50Hz? Thank you!
Hi,
I'm experiencing issues with ADV7513. Our project is in pre-production and it has been suspended, we have 10 prototypes and 20 products. We haven't seen this on prototypes, but almost 50% pre-products have this issue.
I'm running out of tricks and hoping someone can shed some light on this problem.
With HMDI mode, HDCP on, Audio on or i2s clocking, the DELL S2240T will be flickering static snow every few seconds. As long as I turn off the i2s LRCK or SCLK, the screen will back to normal and stop flickering.
0x0C [5:2] = 0000b has nothing to do with stopping flickering, despite all four I2S are Disabled, as long as the LRCK and SCLK are clocking, the screen will start flickering. Meanwhile, if I2S is Enabled, the normal sound mix with popping noise that may be heard.
I have connected the output to an HDMI 1.4 protocol analyzer VA-1831, HDCP, HDMI, EDID, DDC, and AUDIO are all green, there is no error reported and no flickering, the CTS, N, and other registers are set correctly.
I have opened up S2240T to see what's inside, this model is using a Mstar LCD controller, there are 4 pairs of 0-ohm resistors on the HDMI bus between the connector and the LCD controller to damp the signal. I have probed all TMDS and done an eye diagram, all good and nothing looks too off.
I have tested on the other 4 sets of the same model S2240T, I can reproduce the same issues on all of them, as long as the I2S is clocking, the monitor will start flickering static snow every few seconds.
We have confirmed that all the signals go into ADV7513 such as 24bit-RGB HS VS DE meets the requirement on the datasheet. (Please refer to the attachments)
When the flickering happens, I have also dynamically shifted the Pixel CLK from 0 to 360 degrees, to verify if it is caused by phase shift. Well, it's not.
I thought it was due to faulty ESD protection and common mode chokes sat on TMDS pairs, so I removed them all, and it still flickering.
I spray QRA-S481 on ADV7513 to cool it down to -10°C then heat it up to 85°C, it still flickering. So the temperature is irrelevant.
I bend the board around ADV7513 with heavy force, it stops flicking, but the X-ray tells us that all the soldering are properly done.
I can only reproduce this kind of problem with prototypes by combination of a specific weak cable + I2S clocking + HDCP + DELL S2240T
The prototypes are using ADV7513 Lot 3483418.1 #1619.
The products are using ADV7513 Lot 3882312.1 #1725 and Lot 3797027.1 #1713.
I have a bad product board it issues flicking static snow to all kind of monitors, I have confirmed that the RGB HS VS DE timing is good. Stop the I2S also stops flicking, then I put a Lot 3483418.1 #1619 to replace Lot 3797027.1 #1713. on the bad product board, the problem seems to get fixed.
Thanks,
Best Regards
Ben
-------------------------------------------------------------------------------------------------------------------------------------------------------
Update:
We have found some pre-product still had flicking problems after tied I2S to LOW.
So we have to force the ADV7513 working at DVI mode 0xAF[1], it seems to be OK by now, but completely lost all audio functions.
--------------------------------------------------------------------------------------------------------------------------------------------------------
SUMMARY
There are several Causal Factors:
HDCP must be ON
HDMI mode must be set
I2S must be clocking
S2240T must be at the end.
1080p must be selected.
Sure things:
80% reproducible.
No HDCP Errors when flickering.
Timing requirements are all satisfied.
Eye diagrams are good.
Not due to faulty filters.
Temperature is irrelevant.
X-Ray reveals perfect soldering.
prototypes vs products same PCB design but different makers.
TMDS channel has been carefully impedance matched.
Requesting datasheet, but haven't heard a word from mstar yet.
Not Sure:
Better Lot 3483418.1 #1619.
Worse Lot 3797027.1 #1713.
No idea Lot 3882312.1 #1725.
Bend the board seems to fix.
---------------------------------------------------------------------------------------------------------------------------------
We have tested on a couple of monitors, most of them work well, except S2240T.
here is the list.
ASTRO VA-1831 HDMI 1.4 protocol analyzer
DELL S2240T
GREEN-HOUSE GH-LCT22B-BK
IIYAMA PL2451MT, E2380HSD
PHILIPS 243V
ASUS VT207N, VS24A
MITSUBISHI RDT234WLM-D
LG 23ET63V
SAMSUNG 740BX (HDCP not supported.)
NEC AS191WM
ACER V195HQL
---------------------------------------------------------------------------------------------------------------------------------
Here is the timing at 1080p 148.5MHz.
Yellow: CLK, Green: D0
Yellow: CLK, Green: D23
Yellow: CLK, Green: DE
Yellow: CLK, Green: HS
Yellow: CLK, Green: VS
I want to cascade 3 RF gain stages using ADL5611. I power each ADL5611 directly from a laboratory power supply of 5V. Individually each IC draws a current of 85-90mA. But when I power up two of them together the current reaches 400 mA(170mA expected). I have used a microstrip design on Arlon AD600 substrate and used a layout similar to the evaluation board. This combination occasionally works but mostly gives unexpected results. Can you kindly help resolve this issue?SMcBride
The fido5100 supports the following protocols: PROFINET real time (RT) and isochronous real time (IRT), EtherNet/IP with and without device level ring (DLR), Modbus TCP, SERCOS III, and POWERLINK.
The fido5200 supports the following protocols: EtherCAT and all protocols defined for the fido5100.
See data sheet:
http://www.analog.com/media/en/technical-documentation/data-sheets/fido5100-5200.pdf
Please see here: Runtime Device Driver Customization
There is a file in debugfs (initialize) which allows you to reinitialized the device from reset.
You can also unbind and rebind the driver from sysfs.
-Michael
I don't quite understand. The ad9361_baseband_auto_rate.c function uses some very generic wideband FIR filters.
But I guess you want to load the LTE15 FIR!?
Are you saying - that when loading this filter the waveform is not correct until you switch the two HB filters?
-Michael
As per the graph, the transmitter EVM/SNR is 36 dB. But the higher modulation like 64 QAM requires 27 dB SNR @1e-6.. To achieve this the QAM transmitter should be at least 10 dB more of required SNR of 27dB i.e around 37 dB. How it will be good for QAM64. please comment on this.
regards,
Lakshmi
Hi Yuga,
If you want the part to be in rheostat mode keep A20 open and measure the resistance between W1 and B1 keeping BUF-W1 and A21 open as well.
If you connect to AC+DC it is no longer in Rheostat mode.
Regards,
Koushik
Hello,
I've been using ADF4360-7 in several designs . .
The ref frequency is a 16.368MHz crystal. ADIsimPLL was used for the design of a fixed frequency output of 398.98MHZ. Power supply is 3.2V well regulated. Nominal settings are:
C reg: 0x004FC520
N reg: 0x0261622
R reg: 0x00300FFD
L1 and L2 are 22nH shunted with 470 Ohm resistor.
The same design works in other boards but I am unable to get it to lock in the current board.
On checking the cp pin out im getting a square wave of frequency 8khz.Im debugging the issue from two months.
can u plz tell me what may be the issue and wt could be done to solve it??
hi:
I also found this problem when i test ad9361 at 2R2T, LVDS, FDD MODE, under 50m sample rate .
The last snapshot I posted was the following:
--------------------------------------------------------
My control setup bits are the following -
AD7934_setupBits = 12'b001101000111; // = DB11 -- DB0
So power mode is DB11-10 which is set to 00 = normal mode.
I double checked that during the write phase, the setup bits were transmitted properly while CS and WR were low, and RD high.
Schematic -
Vcc_ANA is 5V, Vcc_3_3 is 3.3V.
Vcc_ANA (5V) is decoupled with a 10uF tantalum cap - TAJP106K006RNJ, (C23) and a 100nF ceramic (C24).
C25 is a 470nF ceramic.
C26/C27 are 10uF and 100nF.
3.3V supply.
A photo of my PCB for reference, connected to a ICE40UL1k FPGA dev board.
