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Re: FMCOMMS2 Zedboard no-OS Chipscope ADC signal not as in demo

Hi Dan,Did you download and install the device tree compiler project, and add it to the list of source repositories in SDK (Preferences > Xilinx SDK > Global Repositories) ?  $ git clone...

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Re: VisualDSP automation - Masking Interrupts

Hello, The issue is that we only read the target options from the registry at startup and then we use a local copy inside our library.  Whenever you change the target options dialog and select OK we...

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ADV7623 design collateral

Hello:I am looking for any design collateral that is available to aid in my design with the ADV7623.  Is there a support wiki page?  A reference design would be the ultimate but will take anything that...

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Re: AD5684 Power Management

Hi ddarko, The Vlogic pin of the AD5684 is the “Digital Power Supply” which powers up the digital block of your IC. It also sets on what level your digital communication line will be. The usual Vlogic...

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Re: ADV7623 design collateral

Have you seen the ADV7623 Design Support Files FAQ? http://ez.analog.com/docs/DOC-2573 It has some good information. -Matt

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Re: ADC7762 on board differentail amplifier

Hi Brad, Yes since these pins are connected to circuitry which is supplied by AVDD3.This is nominally a 5V supply, hence, it can take a 5V input signal. Thanks and Best Regards,Chris

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Re: Gain Error for high resolution ADCs

Hi, The gain error is defined on page 13 of the datasheet as “the deviation of the difference between the actual level of the last transition and the actual level of the first transition from the...

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ADV212 compressed image seems shrouded in a frog

Hi all:     My ADV212 can work,but the compressed image seems not that right, I compressed tripes and dynamic video,these figures seem like shrouded in a frog,the figures are attached below,is the...

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Re: Positive Gain Error correction in AD7734

Hi Jebas, The system FS calibration reduces the FS error to the order of the noise. 0.01% equates to 1 mV for a 10 V input. From the noise tables, the p-p noise (which is equal to 6.6 x rms noise) is...

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Re: A couple of questions for AD7607

Hi, 1. That’s right, Figure 5 on page 9 follows the falling edge of CS on Figure 2 on page 8 of the AD7607 datasheet.2. By stopping reading, do you mean not issuing a RD/CS pulse to the part? Applying...

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Re: about VisualAnalog

Hello Doug-san, Happy New Year. Thank you for reply. We check the our canvas by the following settings. Best regards,Kou

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ADV212 RCTYPE(TargetSize) Quality Estimate

I am using an ADV212 paired with an ADV7180. I am setup for NTSC 422. I have RCTYPE set to "Target size per video field or image" Is there a simple formula to compute an image quality estimate (maybe a...

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SHARC C/C++ Code Optimization

I'm starting to learn about how to best optimize C/C++ code to run on the SHARC architecture (21369 and 21469 processors), and I was hoping some of might have some suggestions as to how to go about...

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ADG1406 in LFCSP_VQ package. It is analog mux. All channels except last on...

I am using ADG1406 in LFCSP_VQ package. It is analog mux. The first 15 channels are working fine but the last one with output on pin 1 in this package does not work. Signal does not propagate through....

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Re: GPIO on ADuC7060

Attached is a drawing. I have 4 of these circuits connection to P1.2, P1.3,P0.5, and P0.6.

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Re: ADV212 compressed image seems shrouded in a frog

HI:     Thank you for your prompt reply,the compressed images are grayscale,so there's no chrome component at all,the output data i think is just the luma component, images are viewed using Kakadu,and...

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Can ADV7401 output 720p@30fps analog component with 8bit-4:2:2(DDR mode)?

Hello, I have questions about ADV7401. Question 1:Can ADV7401 output 720p@30fps analog component with 8bit-4:2:2(DDR mode)? Question 2:Please see attached file "pic19954.gif".This picture is from...

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parallel byte interface mode of AD7606

Dear Sir/Madam, We are going to use the parallel byte interface mode,and have two questions about DB[13:9]. Q1.There is the following description.   P.15 of datasheet,    "When PAR/SER/BYTE SEL = 1,...

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Re: ADV7612 with SONY DVD player BDP-S490 sync lose issue

Dear Sir, U-Boot 2010.06 (ADI-2010R1-RC2) (Jan 12 2011 - 15:53:34) CPU:   ADSP bf524-0.2 (Detected Rev: 0.2) (spi flash boot) Thank you !! Best regardsSam

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AD9783 Settling time?

What is the AD9783 settling time and are the specification / measurement conditions? ThanksDave

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