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Does the FMCOMMS2/3 reference design require IQ correction in the FPGA?

Hi, I have recently managed to get the latest FMCOMMS2/3 AD No-OS reference design up and running on my Zedboard using Vivado2014.2. Previously I was using the FMCOMMS1 platform. Illustrated in the...

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Re: ZYNQ ZC702 - PL design only

Due to some error, we just saw this question. Please let us know if you are still having issues. Charly

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Re: Multiple AD7476 (PmodAD1)

Due to some error, we just saw this question. Please let us know if you are still having issues. Charly

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Re: No-OS driver for updated axi_ad9361 core

Due to some error, we just saw this question. Please let us know if you are still having issues. Charly

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Re: ADV7842: CVBS input with B&W signal

GuenterL, excuse me, but the same questions, but other words: 1. I asked about “Read Only” register “SDP_STD[3:0], Addr 90 (SDP), Address 0x52[3:0]” (p.90): which codes will be in this register if on...

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Test - ignore

test    

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ADV7625 OSD Pipeline Delay

HI ADI,I haven't found any mention of the OSD pipeline delay in the data sheets or manuals (maybe I missed it?). This is the delay (in pixels, lines, frames) that is caused when the video data is...

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Re: ADV7625 OSD Pipeline Delay

Follow up question...What is the overall pipeline delay from Rx in to Tx out for video through the part with the OSD path bypassed?

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Re: ADV7842: CVBS input with B&W signal

1) For NTSC B&W it should read back 0x00 or 0x02,  NTSC-M/J or HTSC-433 assuming the input timing is one of the NTSC formats 2) SPD_BURST_LOCKED_RB indicates the device has locked to the color...

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Re: Compiler warning cc0167

Are you sure you are using Blackfin GCC?

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Re: Unable to use AD5764R Evaluation Software

Hi Estibaliz, Yes, I followed the order. It didn't work.But I solved it. I reinstalled the software without changing anything and it works now.I changed the installation directory to D drive when I...

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Re: ADV7181C - Output Data Format

First of all ADV7181 DDR mode is really only intended to output 24 bit RGB.  My recommendation is don't even attempt to use DDR mode than you don't have to worry about interfacing to it and you...

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Re: Discrimination, BPM and SPL for ADAU1761

Any thoughts from anyone?

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Re: Test - ignore

You have the correct permissions now.  It appears your name was not in the moderators group itself.  By adding you in there, all rights were returned.

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Re: ADIS16251 vs. ADIS16265 Performance

Hi NevadaMark, Using the settings you've suggested, the data from my latest tests seem to corroborate the values you gave above for the angle random walk of the two sensors. This is despite the fact...

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Re: Cheapest way to do a NOT gate

Yes, I can't think of anything better than the Zero Comparator.  Its output bit selector comes in handy as well.

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Re: ADV7630 internal EDID issue

Thanks, Matt!!

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ADV7623 CEC connection

Hello, I am designing the ADV7623 HDMI tranceiver into a product and understand all of it's operation except for the CEC connection. As I understand it, the CEC connects from a source device (Blu ray...

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Re: ADIS16251 vs. ADIS16265 Performance

Thank you for sharing these results with us.  Great work!  We look forward to hearing how things progress for you!

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Re: ADIS16407 PCB layout

We do not expect the ADIS16407 to exhibit abnormal sensitivity to local EMI sources. Having said that, we have never tried what you are considering but we can offer that any evidence of misbehavior...

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