Hello Jim,
And, "Old age wants to find out", so I tried to duplicate your result in a project with six divides as shown below. Here I got the same 53 instructions for all of them:
I'm using SigmaStudio 3.9, in case that makes a difference. In any event, I could not find the precision tradeoff described in the wiki, either. ADI needs to work on their documentation, which is a shame because I remember when their data sheets were exquisite -- back when I was young, and analog meant -- well, analog. Hopefully someone from ADI can explain, fix, or help work around the double-resource problem you're experiencing -- they will probably need to see your project file.
Here's an idea you might use if your application can tolerate divisions at only half sample rate:
It multiplexes one divide block between two sets of operands, providing two results. The zero comparator with feedback chases its tail to provide a clock at fs/2. This drives the ABCD logic blocks to share the single divide block between two separate uses. It looks complicated but all the blocks are cheap ones. As shown, this conserves 14 instructions compared with individual divide blocks. It gets better with more divides (they use the same clock), and better still when two divides share an operand (eliminating an input multiplexer).
Best regards,
Bob