Sorry Rejeesh, I might be confusing you and thanks for helping me out over the weekend.
I like to use the default flow, I started to use these different ways of doing it because I thought the default flow didn't work for me and I wanted to figure out why.
Let's use the default flow. Here is the default flow for me, lets agree on that and I will make sure to follow it and let you know how it goes:
- Open EDK and run to generate the netlist and bitstream (the generated files are under the implementation folder)
- In EDK, click on "Export Hardware to SDK" with open SDK option clicked (this updates the folder \hw to be used by the SDK)
- After the SDK has started, clean the project and rebuilt elf file (the elf file should be updated using the new files under the \hw folder)
- Program the FPGA with the bitstream (SDK\SDK_Workspace\hw\system.bit) and bd_bmm (SDK\SDK_Workspace\hw\system_bd.bmm) files.
- Use the latest generated elf file to run the program.
Is this the correct flow that you recommend me to follow?
Regards,