hi everyone
I work on FMCOMMS2 board with my own XILINX V6-FPGA.
TEST environment:
FDD, TXLO: 2.45GHz, BBPLL:983.04MHz, BBBW:5MHz, test signal: 100kHz cos and sin to be I and Q without attenuation.
During my test, a power collapse occurred when the TX channel had opened for about 3sec. The collapse is observed in a frequency spectrum analyzer and the operation current falls down from 0.19A to 0.12A.
But when the data ports(here is P1) are set to all zeros, a stable carrier signal(2.45GHz) can be observed in the spectrum analyzer.
What may cause the power collapse ?
Thx all.