Hi,
I am working on AD9361 in my customized board and i am facing some problems on receiver side. Below i mentioned few questions on AD9361
1. I Configured the chip with below settings.
FDD mode, RX enabled and Tx disabled,
MGC mode with 0 dB gain.
Receiver LO configured to 400 MHz, 4.5 MHz RF bandwidth and 30 Msps.
Reference freq: 40 MHz
i fed 401 MHz signal from signal generator with -30 dBm input level. I captured I & Q digital data in Chip scope and plotted in Matlab, But i observed so many spurious along with required 1 MHz signal.
I attached the one of plotted image of ADC data of receiver. Could you please tell because of what i am getting this spurious and how to improve to SNR as well as SFDR? Could you please tell which component is creating this non-linearity.
2. How to suppress Tx VCO leakages? Is any recommendations to improve the Tx VCO leakage by programming the Tx RF synthesizers differently? will Tx VCO leakages spurious in the receiver.
3.. Is any recommendations to improve the I/Q demodulator linearity performances?
4. What performances are critical to improve the receiver mixing products performances?
5. Is it possible to monitor the spectrum in signal path of receiver or transmitter? How to loop back and bypass particular sections inside of AD9361?
6. By Using TXMON pins, is it possible to monitor and display the output power of PA?
7. Any recommendation regarding the use of CMOS or LVDS? What about the leakage of the LVDS signal over the RF channel?
8. When we are operating device in TDD mode transmitters enabled, Tx attenuation is 10 dB. With this settings we are getting clear spectrum with good C/N, If I set attenuation > 24 dB output spectrum become worst (noise floor is raising more than 20 dB higher) and signal is not demodulating in signal Analyzer. But in FDD this problem is not occurred. Is there any recommended settings for TDD mode?
