Hello jorpese,
Actually, the rise time of the buffers are not going to be the controlling factor. It is good that they are capable of going really fast but they will only be as fast as the signal coming into the input. So it is the rise time of the AD1939 that will limit the rise time of the signal. Unfortunately, we do not provide that specification in the datasheet. Now on to your other questions. I think it is good to buffer the signals. I imagine the clocks will need to go two different directions so having multiple buffered outputs will prevent you from having long "T's" and stubs on the clock lines. Also, you are using these buffers on both the LRCLK and the BCLK which is the correct way to do it. This keeps the edge timing from skewing due to propagation delays through an additional part.
Regarding emissions: It is good to keep turns and vias to a minimum but proper termination will be very important for both emissions and for the stability of the system. You seem to be well aware that the frequency of the signal is not as important as the frequencies present in the edges. (the rise time) So yes, you will need to terminate the transmission lines properly. Saying to just put a 33 ohm resistor is not the fix all. It may be the answer but it is just a guess. You actually have a bit of a tricky situation with the connector to the DSP board. Connectors are always tough to deal with and tough to get proper models for analysis. Are you running ground on the pins around the clocks through the connector? This is important to minimize the impedance change at the connector and to provide a path for parasitic return currents. Then you have the rest of the transmission line all the way to the DSP. The choice of the resistor value will depend on all these variables with the output impedance of the driver being one of the more important variables.
What it important it to prevent the signal from overshooting or undershooting the power rails due to reflections. This can actually couple the signal into the power and ground planes via the ESD protection circuits on the pins of the parts. Then those noises can radiate, cause performance issues, clocking errors and crosstalk. The best way to deal with this is to properly model your PCB using a good signal integrity simulation program. We use Hyperlynx here in house. If you have already built the boards then you can look at the signals with a scope but you must use an active probe. A regular scope probe has far too much capacitance.
You did mention that you kept the line impedance to around 50 ohms. So I assume you are using ground and power planes? There are so many other factors for noise and emissions. The planes need to be decoupled at many points around the plane to prevent the planes from becoming antennas.
If you like I would be glad to take a look at your PCB design. Send me an email if you want to pursue this further.