Hello Folks
My question is: when a whole block data is received and interrupt is triggered, where does DMA put the next block data? does auotbuffer automatically assigns memory for this? if this is true, this implements ping-pong buffer mode as well?
for 2-d interrupt, at page 6-55 of bf518 hardware reference, it says this implements a traditional "ping-pong" buffer. as a result, interrupt is triggered when half DMA block data is received. At this moment, dma continues working and put data at the 2nd half of the receive buffer, while processor is handling 1st half.
My quesiton is: in terms of ping-pong buffer, what's the difference between 1-d and 2-d DMA?I have one question regarding BF518 Interrupt Driven DMA.
I2S data is a steady streaming from ADC.
My scenario is: BF518 receives I2S data from SPORT via DMA, process data and sends out I2S data from SPORT via DMA as well.
I'm wondering if I should use 1-d or 2-d interrupt driven DMA (autobuffer enabled).
Would you please help confirm my understanding:
for 1-d interrupt, when interrupt is triggered, DMA continues receiving data.My question is: when a whole block data is received and interrupt is triggered, where does DMA put the next block data? does auotbuffer automatically assigns memory for this? if this is true, this implements ping-pong buffer mode as well?
for 2-d interrupt, at page 6-55 of bf518 hardware reference, it says this implements a traditional "ping-pong" buffer. as a result, interrupt is triggered when half DMA block data is received. At this moment, dma continues working and put data at the 2nd half of the receive buffer, while processor is handling 1st half.
thanks.