We are working with ADV7182 chip. We have differential CVBS signal input to the chip and our circuit is something like the attached figure. So with a standard 1V peak to peak CVBS input, when it reaches the chip, the signal level would be less than 1V, e.g. 0.5V. At this point, the signal level will not conform to the standard CVBS signal 1Vp-p. In the datasheet, it mentions that the allowed range of input video signal for the ADC in the chip is 0V to 1V. We are still worried about the input signal level issue. Can anyone here tell us that when the CVBS signal reaches at the chip input, what (minimum) analog input level is required for the ADC to distinguish and convert the video signal? Thanks,
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