Hi rschoop,
Yes you are correct. With the active low and late frame sync, one should be able to receive the data from ADC, sorry for creating confusion earlier.In the attached code for BF548 Timer 1's width is 128 and timer 2 period is 8.So there would be 16 sport clock for 1 frame sync low period and 4 such frame sync in one conversion period ADC. This looks fine. Waiting for busy period also looks fine with TMR4 ?I understand significance of TMR5 and the need for disabling FS here for Synchronization .But It is disabling the FS generating TMR after 640 count. 640/192(FS period) comes around 3.3. In Sport0 code, you are only considering 6 channel and in sport 1 code you are considering 8 channels. The fourth frame period is not allowed to complete here right? Can you please explain am I missing something here?
Regards
Sachin