Hi Liu,
Flag pins (FLGx) can be programmed as input or output pins using bit settings in the FLAGS register.
Eg:
bit set FLAGS FLG3O; /* set Flag1 IO output */
bit set FLAGS FLG3; /* set Flag1 level 1 */
bit clr FLAGS FLG3; /* clear Flag1 level 1 */
The status of the flag pins is also given in the FLAGS register.
For core Flag pin multiplexing details , refer to Pg.No 928 of the ADSP-214xx Hardware reference Manula given in the following link :
http://www.analog.com/static/imported-files/processor_manuals/ADSP-214xx_hwr_rev1.1.pdf
Thanks,
Mahesh