Let's tackle this one step at a time.
1) you have 2 PAL camera's which are 576i25, pixel clocks are locked but field, H & V syncs are not frequency locked or phase locked. So the first step is to capture a PAL frame, one from each camera and store them in a frame buffer where the buffers are working at 25Hz rates. This requires converting an interlaced image into a progressive image.
2) Now you have 2 full PAL frames (once per 1/25th of a second) and you need to convert them in 2 VGA frames, possibly 640x480@25. This would be a scaling issues.
3) Now assuming your LCD is UXGA 1600x1200 @ 50 then you would need to up scale the VGA frame to 1600 x 1200.
4) All of this frame formatting and scaling can be done in the PAL YCbCr color space but the LCD probably needs RGB so you need to convert the final output from YCbCr to RGB. This is the easy step.
5) Then you need to pack the Left/Right image into a standard HDMI 3D format. CEA-861 shows what these formats look like for HD TV but not UXGA so you would have to define you own non-standard format. not sure your non-standard format would work with the TV. Maybe it's just better to plan to output the 3D in standard HDTV format, (1080p50). Your decoder would have to decode the left/right shutter information as it unpacks and displays the frames.
All during these steps you need to worry about different clock domains. And have enough bandwidth to memory to store 2 image frames. None of this is trivial.
Sorry I don't have a FPGA solution to point to.
