Re: adv212 HIPI mode problem

Hi Dave,

     I have checked my timing and DMA settings.

     My MCLK is 70Mhz.So JCLK is 140Mhz. DMA burst frequence is 35Mhz.When DREQ0 is asserted,I write pixel data with DACK0='b0,WE,ADDR='b0000.

     If I don't write 16(the burst length) words to PIXEL FIFO.Is DREQ0 asserted again or wait for data until 16 words?

     I will try to find the number of bytes wrote to adv212.

     Thank you!

     Liao