Re: help choosing and configuring clock source for AD9102

Hi Lisa -

1. The supplies DLDO1, DLDO2 and CLDO are always 1.8V. If DVDD and CVDD are 3.3V, internal LDOs are used to generate these 1.8V rails. If DVDD and CVDD are both 1.8V, the internal LDOs cannot be used. DLDO1, DLDO2 and CLDO1 need to come from board level 1.8V supplies. The current draw and power dissipation for the two cases is given in Table 8 of the data sheet.

2. Any CMOS buffer or gate output will work in the example shown in figure 39.

Thanks,

Larry