Thanks. Initially your fix revealed another hardware problem (apparently unless R350 is depopulated on the FMCOMMS5 board the external LO splitter circuit will not work), but once I removed R350 and updated to the latest software drivers the external LO worked well even past the recommended external LO 4GHz range. Testing out to 6GHz (12GHz input to J305) looked good.
With most of the startup issues resolved, I am now beginning to look at the calibration routines mentioned in the very first post again, and this has resulted in a third question:
Could you advise on the usage of the calibration controls in the FMComms2/3/4/5 Advanced, FMCOMMS5 tab of the iio oscilloscope? Specifically, I have only succeeded at running the calibration routines (finishes without error) for a center frequency of 600 MHz and internal LO . When complete, I was able to verify that I and Q channels were in phase across both chips as in the original attached presentation.I have tried several other test center frequencies, but they seem to always return "calibration finished with error". No calibration attempts with the external LO have been successful either. Is the calibration technique expected to succeed for all frequencies?
I could be using it incorrectly. My approach is to pick a single center frequency for both the master and slave AD9361 chips, then under Cal Switch Control do the following:
1) Set to DISABLE, execute calibration
2) Set to Tx1B_B -> Rx1C_B, execute calibration
3) Set to Tx1B_A -> Rx1C_B, execute calibration
4) Set to Tx1B_B -> Rx1C_A, execute calibration
5) Set to Tx1B_A -> Rx1c_A, execute calibration
6) If all were successful, check that I and Q are synchronous across chips in the osc
Could I be missing additional steps before or after? I have also tried steps (2) - (6) with little change.
Let me know what you think -- thanks,
Adam