Thanks. The AD9361/4 use the same HDL code, however that might make trouble to optimize the HDL code size into the FPGA.We want to use 1T/1R AD9364 instead of applying the current AD9361 HDL code which the size is bigger than optimized AD9364. Therefore the question is whether you could help to modify the current AD9361 HDL code to make a smaller one which is dedicated for AD9364.
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