Hi Kumar,
Thanks for using the AD9269. I'll address the questions related to the ADC.
The AD9269 power-up default is to not be in interleaved mode. The Interleaved output mode is enabled globally (affects all channels) onto both output channels/ports via Register 0x14, bit 5. If interleaved mode is invoked, the default operation of interleaved mode outputs data to Channel A as ADC_A/B as shown in datasheet Figure 3 and I believe outputs data to Channel B as ADC_B/A (not shown in datasheet). The undesired channel output can then be disabled by selecting the desired Channel (A or B) Index at Register 0x05 Bits[1:0], then writing a 1 to local (channel specific) OEB Register 0x14, Bit[4].
After these register writes, write Register 0xFF = 0x01 to invoke whatever actions were previously specified.
Regarding bypass capacitors for the AD9269, having a large (1uF - 10uF) capacitor in parallel with a smaller (0.1uF) capacitor close to each AVDD pin is good. On our board we have the parallel capacitor combination for each pair of AVDD pins, and this has worked fine. For DRVDD, on our board we just have 0.1uF capacitors close to each DRVDD pin.
For both AVDD and DRVDD we have 10uF in parallel with 0.1uf at the supply entry points to the board.
Please let me know if you have any other questions.
Thank you.
Doug