Re: How to set ADV7619 for Deepcolor

OP_FORMAT_SEL = 0x54   (2x24 SDR 4:4:4)

in http://ez.analog.com/message/43021#43021

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I talked with the ADV7619 expert and he said the following:

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2x24 modes implies bypassing CP core. (all those 0x96, 0x54 etc…) so no CSC.

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-Matt

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for 8bit, the pixel clock frequency  is equal to TMDS frequency,  148.5MHz,

for deepcolor they are different, the pixel clock should be reproduced using PLL,

222/3*2 = 148.5MHz, is there a PLL for this?

now the output pixel clock frequency is about 111(222/2)MHz, this is not correct.