Hi, DaveD,
Yes, we can't lock to a normal signal after inputting a random signal.
And we don't do a hardware reset after a random signal.
We think that one solution is a hardware reset after detecting TMDS PLL unlock
using TMDSPLL_LCK_A_RAW(IO 0x6A[6]) etc. to solve it.
Is there another solution to improve TMDS PLL lock performance setting some registers?
Best regards,
Nikkee