ITU BT.656-4 input can't be detected by ADV7511

The setting for ADV7180 mostly are the same as kernel driver in drivers/media/i2c/adv7180.c. And NTSC/PAL mode can be correctly detected by autodetection function. The main setting is as below.

      *  ITU-R BT.656-4 : 0x04[0:7] -> 0xC4

      *  32-lead LFSCP - Mode 3 525i/625i YPrPb Input(Y on Ain1, Pb on Ain2, Pr on Ain3) : set all the register based on the I2C programming example on page 109 of datasheet

   ? * Table 66 - User setting for PAL : do I have to setting those registers if the input video format is PAL, or autodetection function would set for me?

The setting for ADV7511 are as below, by looking up the programming guide Rev G, in the purpose of detecting the input video mode.

* input format (Table 21 - 8 bit YCbCr 4:2:2 with 2x pixel clock, embedded syncs):

     * input_id : 4

     * input_style : 2

     * bit_justification : right

     * input_color_depth : 8 bit

     * sync_pulse : no sync pulse

* input data clock (Figure 5 - Input clock Divide Control):

     * input clock divide control : 0xA4[6] -> 0x1 , 0x9D[3:2] -> 0x01

     * clock_delay : no delay

* DE, Hsync and Vsync Generation (Figure 6 - Sync Processing Block Diagram):

     * EAV/SAV decoder -> DE generated based on EAV/SAV -> Hsync and Vsync generated based on DE: 0xD0[1] -> 0x1, 0x17[0] -> 0x1, 0x41[1] -> 0x1

   ? * 0x30~0x3A, 0xD7~0xDB : totally lost in Figure8~10 about Hsync/Vsync generation and ajustment, need help, for example 576i PAL

   ? * hsync_polarity, vsync_polarity : high or low depends on the output format setting of ADV7180, right?

     * timing-generation-sequence : DE generation then sync adjustment

* video mode detection:

    * input aspect ratio -> 16:9

* fixed setting:

     * power up : 0x41[6] -> 0

     * fixed registers: 0x98~0x9D, 0xA2, 0xA3, 0xE0, 0xF9

BTW, the interrupt system works fine, and EDID can be read out.

If I miss or mistake setting any register, please also let me know. Thanks.